
Artificial Intelligence
TIER IV Joins Imec's Automotive Chiplet Program To Accelerate Chiplet-Based Architectures And AI Accelerators For Sdvs

TOKYO, March 9, 2026 /PRNewswire/ -- TIER IV, the pioneering force behind open-source software for autonomous driving, has officially joined the Automotive Chiplet Program (ACP) overseen by imec, a world-leading research and innovation center in nanoelectronics and digital technologies. This partnership serves as a technical foundation for TIER IV's multi-environment, multi-application strategy, designed to deliver scalable autonomous driving solutions across the global mobility ecosystem.
A unified strategy for the SDV era
As the industry pivots toward software-defined vehicles (SDVs), the decoupling of hardware and software has become a competitive necessity. TIER IV is addressing this through two key pillars:
- Multi-environment: Ensures compatibility with vehicles from automakers, Autoware*, open-source software for autonomous driving, and hardware architectures, including system-on-chips and sensors.
- Multi-application: Supports various use cases through system development and integration, embedded vehicles, reference designs, and customary services.
Chiplet technology is an approach to building semiconductors by combining various chips with specific functions. By participating in the ACP, TIER IV is advocating for chiplet-based architectures that allow these diverse software applications to run efficiently across different silicon platforms. This modularity ensures that vehicle manufacturers can utilize the best-in-class processing for their specific needs without being locked into a single proprietary hardware vendor.
From LiDAR processing to AI acceleration
A critical component of this collaboration is the co-design of specialized hardware accelerators. TIER IV has already achieved a major milestone by finalizing the development of a LiDAR accelerator, designed for high-speed 3D point-cloud processing.
Building on this success, TIER IV is now focusing its research within the ACP on AI accelerators tailored for AI-based autonomous driving. As Autoware moves toward neural networks that handle everything from perception to planning, the hardware must evolve to support high-throughput AI workloads. Chiplet technology allows TIER IV to integrate its perception expertise directly into the system-on-chip alongside other compute tiles, ensuring the low latency and high efficiency required for future auto-grade autonomous systems.
"Our strategy is built on the principle that autonomous driving should be adaptable to any platform and any use case," said Shinpei Kato, founder and CEO of TIER IV. "Joining imec's ACP allows us to harmonize open-source software with silicon based on open standards. Regardless of the underlying computing architecture, our goal is to ensure that Autoware and our AI-based models deliver peak performance through optimized chiplet designs."
"We're delighted to welcome TIER IV to imec's ACP," said Bart Placke, VP imec Automotive. "As the automotive industry transitions toward chiplet architectures, it is increasingly clear that this shift cannot happen in isolation. That's why ACP brings the ecosystem together in a pre-competitive effort to align on standards and validate approaches that meet automotive-grade requirements. With TIER IV on board for this program, we can combine our semiconductor and system integration expertise with their leading capabilities in autonomous driving software and reference platforms. Together, we aim to accelerate the maturation of chiplet-based architectures that will underpin the next generation of safe, reliable, scalable and energy-efficient autonomous mobility."
Building the future of open hardware
TIER IV is working with a global ecosystem of industry leaders to define the pre-competitive standards for automotive chiplets through the ACP. This collaborative effort ensures that the Autoware Foundation's Open AD Kit and TIER IV's Co-MLOps platform remain at the cutting edge of semiconductor innovation. By championing an open, interoperable chiplet ecosystem, TIER IV is fostering a transparent supply chain that accelerates the path to safe and scalable autonomous driving worldwide.
*Autoware is a registered trademark of the Autoware Foundation.
About TIER IV
TIER IV stands at the forefront of deep tech innovation, pioneering Autoware, open-source software for autonomous driving. With a comprehensive suite of platforms and services built around Autoware, TIER IV provides everything from software development and vehicle procurement to operational support. Through the Autoware ecosystem, TIER IV works with partners worldwide to shape the future of intelligent vehicles with open-source software, aiming to create mobility that is safer, more sustainable, and accessible to all.
Media contact
pr@tier4.jp
View original content:https://www.prnewswire.com/news-releases/tier-iv-joins-imecs-automotive-chiplet-program-to-accelerate-chiplet-based-architectures-and-ai-accelerators-for-sdvs-302707755.html
SOURCE TIER IV, Inc.
Frequently Asked Questions
What is the purpose of TIER IV joining imec's Automotive Chiplet Program?
TIER IV joined the program to accelerate the development of chiplet-based architectures and AI accelerators specifically for software-defined autonomous vehicles (SDVs), leveraging open standards to create scalable solutions.
What is chiplet technology and why is it important for autonomous driving?
Chiplet technology involves building semiconductors by combining various chips with specific functions. It's crucial for autonomous driving as it allows for modularity, enabling diverse software applications to run efficiently across different silicon platforms and providing flexibility for vehicle manufacturers.
What specific hardware accelerators is TIER IV developing through this partnership?
TIER IV has finalized the development of a LiDAR accelerator for high-speed 3D point-cloud processing and is now focusing its research within the ACP on AI accelerators tailored for AI-based autonomous driving, supporting high-throughput AI workloads for neural networks.
First published on Tue, Mar 10, 2026
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